发明名称 |
RECIPROCAL ARITHMETIC UNIT |
摘要 |
PURPOSE:To provide a reciprocal arithmetic unit capable of performing a highly accurate reciprocal computing operation even when the bit width of input data is larger than the usable bit width of the address of a ROM. CONSTITUTION:A first reciprocal computing means 1 computes the reciprocal of a number for which a constant N (where N is an integer satisfying ¦N¦<2<a-b>) is added to the upper (b) bits {where (b) is the positive integer of (b)<(a)} of the element number A of an (a) bit width {where (a) is the positive integer} by a table. A subtractor 5 subtracts the constant N from the lower (a-b) bits of the element number A, a first multiplier 3 multiplies the result of the first reciprocal computing means 1 and the result of the subtractor 5 together and a second reciprocal computing means 2 computes the reciprocal of the number for which '1' is added to the multiplied result of the multiplier 3 by the table. A second multiplier 4 multiplies the result of the first reciprocal computing means 1 and the result of the second reciprocal computing means 2 together and the multiplied result becomes the reciprocal of the element number A. |
申请公布号 |
JPH07210372(A) |
申请公布日期 |
1995.08.11 |
申请号 |
JP19940023477 |
申请日期 |
1994.01.26 |
申请人 |
KOKUSAI DENSHIN DENWA CO LTD <KDD> |
发明人 |
KAWADA RYOICHI |
分类号 |
G06F7/52;G06F7/535;G06F7/552 |
主分类号 |
G06F7/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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