发明名称 MANUFACTURE OF MOS MOLD FIELD-EFFECT TRANSISTOR WITH LOW CONCENTRATION DOPING DRAIN
摘要 PURPOSE: To manufacture an LDD element, without the use of a sidewall spacer as an ion-implantation barrier layer by forming a larger of a heat sensitive fluid material, and then heat-treating it. CONSTITUTION: A gate insulating film 2, a gate electrode 3a, a conductive layer 3 and a heat sensitive fluid material layer 4 which temporarily becomes a flowing condition by heating are formed on a semiconductor substrate 1. The heat sensitive fluid material layer 4 and the conductive layer 3 are etched to form BPSG layer 4a/gate electrode 3a, having the same pattern. After a first ion-implantation for formation of a lightly doped drain has been carried out into the substrate, heat treatment is performed to flow the heat sensitive fluid material layer on a gate wiring pattern, so that a crosssection which is parallel to the semiconductor substrate is made larger than the original area. Then source/drain regions are formed by a secondary ion-implantation, thus manufacturing a MOS field effect transistor containing lightly doped drain.
申请公布号 JPH07202198(A) 申请公布日期 1995.08.04
申请号 JP19940291307 申请日期 1994.11.25
申请人 ERUJII SEMIKON CO LTD 发明人 GUMUUJIN PAAKU;CHIYANGUUJIYAE RII;UONNHIYUKU RII
分类号 H01L21/266;H01L21/336;H01L21/469;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L21/266
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