SHARED TESTING REGISTER AND INCORPORATED SELF-TESTING CIRCUIT USING THE SAME

摘要

PURPOSE:To make a shared testing register applicable to the multicycle circuit of an integrated circuit so as to easily guarantee timing by constituting the testing register by using N pieces of storage elements which are closely arranged at the time of layout. CONSTITUTION:A register 33 is operated as a register having an N-bit width in the normal mode and is made to output the information stored in the N-bit register to a circuit to be tested in the succeeding stage as a test pattern having (N bit X t)-patterns based on (N bit X t)-pattern input information outputted from a circuit to be tested in the preceding stage in a test mode. The register 33 is constituted of the storage elements of N pieces of flip flops which are closely arranged at the time of layout and the flip flops operate in the same clock cycle. In addition, a test information output line is constituted of one spatially compressed output line 35 and a spatial compressor which outputs the (N bits X t)-pattern information from the output line 35 after spatially compressing the information into (1 bit X t)-pattern information in the test mode is provided.