发明名称 Differential logic level translator circuit with dual output logic levels selectable by power connector options
摘要 Switching between two logic circuits that produce outputs at different respective logic levels is accomplished by means of a common input differential switch that has a branch in each logic circuit. A common current source supplies current to the branches within each logic circuit. The current source remains on regardless of which logic level is selected, thereby enhancing switching speed. The logic circuits produce logic outputs at a common output differential switch, which in turn provides a selected output to a single output terminal. The logic circuits are configured so that the output from the circuit corresponding to the selected logic level dominates the output from the other logic circuit at the output differential switch.
申请公布号 US5428305(A) 申请公布日期 1995.06.27
申请号 US19930129939 申请日期 1993.09.30
申请人 HUGHES AIRCRAFT COMPANY 发明人 WONG, PUCK;LINDER, LLOYD F.;HIRATA, ERICK M.
分类号 H03K19/018;(IPC1-7):H03K19/018;H03K19/086 主分类号 H03K19/018
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