发明名称 |
Pulse width modulator having controlled delay circuit |
摘要 |
A pulse width modulation circuit apparatus of a digital type using a delay circuit and a decoder, which is provided with a delay control circuit for driving the reset-set type flip-flop of a last output stage and which provides the flip-flop with a mode determination function, whereby the range of the operation frequency is broadened, the generation of a blank pulse and offset pulse can be suppressed, and a higher precision gradation expression can be realized.
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申请公布号 |
US5428321(A) |
申请公布日期 |
1995.06.27 |
申请号 |
US19940280182 |
申请日期 |
1994.07.25 |
申请人 |
SONY CORPORATION |
发明人 |
YOSHIDA, HIDEKI;MURAKAMI, DAISUKE |
分类号 |
G06F1/025;H03K5/05;(IPC1-7):H03K7/08 |
主分类号 |
G06F1/025 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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