发明名称 Halbleitervorrichtung und Herstellungsverfahren
摘要 The present invention is mainly characterized by providing an even surface of an interlayer insulating film for insulating and isolating an upper interconnection and a lower interconnection from each other. A lower interconnection layer is provided on a semiconductor substrate, having a pattern of stepped portions. A silicon type insulating film is provided on the semiconductor substrate so as to cover the lower interconnection layer. A silicon ladder resin film is filled in recessed portions of the surface of the silicon type insulating film for making even the surface of the silicon type insulating film. An upper interconnection layer electrically connected to the lower interconnection layer through a via hole is provided on the silicon type insulating film. The silicon ladder resin film has the structural formula: (* CHEMICAL STRUCTURE *) where R1 is at least one of a phenyl group and a lower alkyl group, R2 is at least one of a hydrogen atom and a lower alkyl group, and n is an integer of 20 to 1000.
申请公布号 DE4300355(C2) 申请公布日期 1995.06.14
申请号 DE19934300355 申请日期 1993.01.08
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 ADACHI, HIROSHI, AMAGASAKI, HYOGO, JP;KANEGAE, HIROZOH, AMAGASAKI, HYOGO, JP;MOCHIZUKI, HIROSHI, ITAMI, HYOGO, JP;OBATA, MASANORI, ITAMI, HYOGO, JP;ENDOH, TAKEMI, ITAMI, HYOGO, JP;HAGI, KIMIO, ITAMI, HYOGO, JP;HARADA, SHIGERU, ITAMI, HYOGO, JP;MATSUKAWA, KAZUHITO, ITAMI, HYOGO, JP;OHHISA, AKIRA, ITAMI, HYOGO, JP;ADACHI, ETSUSHI, ITAMI, HYOGO, JP
分类号 H01L21/3205;H01L21/3105;H01L21/312;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L23/522;C30B25/02;H01L21/31;H01L21/302;C30B33/08 主分类号 H01L21/3205
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