APPARATUS AND METHOD FOR DETECTING FRAME SYNC SIGNAL

摘要

a shift resistor for sequentially shifting input signals; a comparator connected to the shift resistor and determining whether the shifted first signal is the initial value of an even frame synchronous signal or the initial value of an odd frame synchronous signal; a pseudo random signal generator for generating pseudo random signals which are sequential output of the even and odd frame synchronous signals according to the system clock by the control of the control signal from the comparator; a logic section for inverting or directly OR operating the second output signal of the shift resistor and the pseudo random signal, OR operating them again and AND operating them and the system clock; a counter for counting the input signal of the logic section; and a synchronous signal determinator for determining whether the output of the counter is over a designated value or not and generating a detection signal for the frame synchronous signal.