发明名称 Series parallel converter including pseudorandom noise generation.
摘要 <p>The invention provides a circuitry with a pseudorandom noise generative function (1) comprising a shift register (11) for converting serial data into parallel data, an exclusive OR gate (13) being electrically connected to the shift register (11) for fetching outputs from the shift register(13), the exclusive OR gate (13) supplying exclusive ORed data to the shift register (11) for use of generating a pseudorandom noise and a switch (14, 15) being electrically connected to a data line (112) transmitting serial digital data to be processed therein and an output of the exclusive OR gate (13) for fetching the digital data and the exclusive ORed data respectively to select the serial digital data or the exclusive ORed data in response to a selective signal, the switch (14, 15) being electrically connected to the shift register (11) for supplying the serial digital data or the exclusive ORed data to the shift register (11), thereby selecting a normal processing mode for the digital data or a pseudorandom noise generative mode for the exclusive ORed data. &lt;IMAGE&gt;</p>
申请公布号 EP0656583(A1) 申请公布日期 1995.06.07
申请号 EP19940118684 申请日期 1994.11.28
申请人 NEC CORPORATION 发明人 ISHIDA, RYUJI, C/O NEC CORPORATION
分类号 H03K3/84;G06F7/57;G06F7/58;H03M9/00;(IPC1-7):G06F7/48 主分类号 H03K3/84
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