发明名称 METHOD FOR DIAGNOSING LOGIC CIRCUIT AND LSI CIRCUIT
摘要 PURPOSE:To easily generate test data by preventing a division circuit from becoming larger when diagnosing an LSI. CONSTITUTION:A division circuit 10 is constituted of logic gate groups 14, 15, and 16 surrounded by edge pins 11, an input flip-flop 12, and an output flip-flop 13 of an LSI 1. Test data control circuit modules 20 and 20' are inserted between the logic gate groups 14/16 and 15/16 and the division circuit 10 is further divided into finely divided circuits 30, 40, and 50, thus making smaller a circuit for which test data are generated. At the time of diagnosis, a test data control circuit 100 writes the output data of a group of pre-stage gates into the module 20 or 20', reads the data by scan-out, writes the data by scan-in, and outputs the data to a group of succeeding-stage gates. At the time of actual operation, the modules 20 and 20' are bypassed.
申请公布号 JPH07120535(A) 申请公布日期 1995.05.12
申请号 JP19930267356 申请日期 1993.10.26
申请人 HITACHI LTD;HITACHI COMPUTER ELECTRON CO LTD 发明人 TAKAHASHI TETSUYA;SHIGEOKA KENJI
分类号 G01R31/28;G06F11/22;H01L21/66 主分类号 G01R31/28
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