| 摘要 |
PURPOSE:To constitute the phase synchronizing loop frequency synthesizer without lowering the cut-off frequency of the phase synchronizing loop circuit. CONSTITUTION:After the output frequency f0 of the voltage controlled oscillator 5 changing its output frequency in response to the output of LPF 4 is multiplied by n 7(where: n is a positive integer.)it is variably demultiplied into 1/N and further into nf0/N. When this is in phase comparison 3 with the frequency nDELTAfSP demultiplying the frequency of the reference oscillator 1 with the fixed demultiplier 8, since the both input frequencies are equal, the frequency is f0=NXDELTAfSP, and when the value of N is changed, multi-frequency integer number times DELTAfSP is obtained. Further, since the comparison frequency of the phase comparator 3 is nDELTAfSP, excellent frequency synthesizer can be constituted without lowering the cut-off frequency of the phase control loop including LPF4. |
