发明名称
摘要 A semiconductor integrated circuit according to the present invention has a series circuit of a first field effect transistor and a load which is connected between a first potential point and a second potential point. The first field effect transistor operates in response to a control signal inputted in a gate thereof, whereby a high-level or low-level output signal is extracted from a node between the first field effect transistor and the load to output terminal. A second field effect transistor is also connected between the output terminal and the first potential point. Thus, when a surge causing the first field effect transistor to break down is applied to the output terminal, the second field effect transistor conducts to pass a surge current, whereby the first field effect transistor is prevented from being broken down.
申请公布号 JPH0734476(B2) 申请公布日期 1995.04.12
申请号 JP19890275417 申请日期 1989.10.23
申请人 发明人
分类号 H01L29/78;H01L21/8238;H01L27/02;H01L27/06;H01L27/092;H03K17/08;H03K17/0814 主分类号 H01L29/78
代理机构 代理人
主权项
地址