发明名称 DEFLECTOR
摘要 PURPOSE: To generate a high-frequency pulse train which is synchronized to an input synchronizing pulse, and can be used for a television receiver, etc. CONSTITUTION: In a synchronous digital horizontal deflection system which operates at a frequency 2×fH, a digital phase locked loop circuit 20 generates a first signal CMa having a first frequency fH synchronized to a horizontal synchronizing pulse HS and a second signal CMb having a second frequency fH which is delayed by a half period H/2 from the first signal CMa. A digital phase controlled loop circuit 120 accepts the first and second signals CMa and CMb and generates a horizontal deflection control signal HORDRIVE which controls the timing of the retracing period of the output stage 41 of a deflection circuit. Synchronization is performed in every other retracing periods in accordance with the information given by the first signal CMa.
申请公布号 JPH0774977(A) 申请公布日期 1995.03.17
申请号 JP19930301238 申请日期 1993.11.04
申请人 RCA THOMSON LICENSING CORP 发明人 DONARUDO HENRII UIRISU
分类号 H04N3/16;H04N3/27;H04N5/06;H04N5/12;H04N7/01;(IPC1-7):H04N3/27 主分类号 H04N3/16
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