| 摘要 |
The sensor circuit of semiconducting memory device accelarates the data access by increasing efficiency of sense amplifier and reduces generation of bit-line capacitance by arranging isolation gate with channels on the individual bit-line. The circuit consists of memory cell arrays (A)(B), a bit-line amplifier (11), isolation gates (MN11,MN12,MN13,MN14) with channels on each bit line (B/L,B/L bar), input-output transistors (12)(13) which transit cell data to input-outputline (I/O,I/O bar).
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