发明名称 Semiconductor integrated circuit fabrication method
摘要 A semiconductor integrated circuit fabrication method for designing and fabricating semiconductor circuit elements on a semiconductor substrate for an LSI comprises the steps of: replacing standard cells with symbolic cells with an one-to-one correspondence; registering the symbolic cells in a library; drawing a circuit diagram for a semiconductor integrated circuit; describing circuit description net statements for the semiconductor integrated circuit; arranging symbolic cells and wiring among the symbolic cells to obtain a symbolic layout based on the circuit diagram and the circuit description net statements; describing a stick diagram by using the symbolic layout; forming a mask pattern by using the stick diagrams; and forming the semiconductor circuit elements and wiring among the semiconductor circuit elements on the semiconductor substrate by using the mask pattern.
申请公布号 US5388054(A) 申请公布日期 1995.02.07
申请号 US19910793106 申请日期 1991.11.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TOKUMARU, TAKEJI
分类号 H01L21/822;G06F17/50;H01L21/82;H01L27/02;H01L27/04;(IPC1-7):G06F15/60 主分类号 H01L21/822
代理机构 代理人
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