| 摘要 |
<p>PURPOSE:To omit an encoder and to reduce the number of sense amplifiers by reading one bit of a superordinate bit at the time of reading at an initial stage, reading one subordinate bit at the time of reading at next stage, and controlling reading and holding of data with a controller. CONSTITUTION:A sequencer 7 is operated at a rise of a read signal, and a reference potential VC2 is output at a rising node C of a signal phi1. A read potential is compared with a potential VC2 by a sense amplifier 3. Since the read potential is low, 'H' is output to a node E, and held in an FF 61. Then, 'H' is output at a rising node H of a signal phi4, a transistor D51 is connected to a bias circuit 4, and a reference potential VC1 is output to the node C. The read potential is compared with the potential VC1 by the amplifier 3. Since the read potential is high, 'L' is output to the node E, and held in an FF 62. As a result, 'H' is output to an OUT 1 in response to stored data of a memory cell transistor, and 'L' is output to an OUT 2. Thus, a circuit can be simplified.</p> |
