发明名称 |
Dual bus communication system connecting multiple processors to multiple I/O subsystems having a plurality of I/O devices with varying transfer speeds |
摘要 |
An Input/Output Module (IOM) interfacing multiple computers attached to a dual system bus. The IOM provides an interbus module which interfaces the dual system bus to a sub-requestor bus connecting multiple sub-requestor modules. The sub-requestor modules control a plurality of interface adaptors permitting data transfers to/from a variety of peripherals using different data protocols and clock rates. The requirements for the main host processors and memories in a computer system would be unduly burdensome were it not for the relief from these overhead operations by the input/output module which provides the tailoring of data transfer capability to and from a multiplicity of peripherals having many different types of protocols and clock rates.
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申请公布号 |
US5386517(A) |
申请公布日期 |
1995.01.31 |
申请号 |
US19930008962 |
申请日期 |
1993.01.26 |
申请人 |
UNISYS CORPORATION |
发明人 |
SHETH, JAYESH V.;HARRIS, CRAIG W.;WHITE, THEODORE C.;NGUYEN, KHA;WONG, CHUNG W.;COWGILL, RICHARD A. |
分类号 |
G06F13/38;G06F15/17;G06F15/173;(IPC1-7):G06F5/06 |
主分类号 |
G06F13/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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