Variable interleaving level memory and related configuration unit.

摘要

A variable interleaving level memory wherein a plurality of independently addressable storage modules are present in a number between 1 and a maximum, comprising a circuit means (14) which, according to the number of the modules present and their capacity, responds to a first field of least-weight address bits (ALOW) and a second field of greater-weight address bits (AHIGH) input thereto by generating a module selection signal for selecting from the various modules present and a plurality of signals (MBIT) representing module address bits, thereby configuring the memory with the highest levels of interleaving and for maximum storage capacity, as allowed for by the number and capacity of the modules present and properly addressing each time the selected module. <IMAGE>