发明名称 METHOD FOR FORMING GATE ELECTRODE IN SEMICONDUCTOR DEVICE
摘要 <p>A method for forming a gate electrode of a semiconductor device is provided to prevent the separation of a gate hard mask on an upper portion of a gate silicide by forming lifting prevention layers on sidewalls and upper portions of a metal silicide electrode and a gate hard mask pattern. A poly silicon layer(12) at which impurities are doped is formed on an upper portion of a substrate(11). A metal silicide layer(13) and a gate hard mask layer(14) are laminated on the poly silicon layer. The gate hard mask layer and the metal silicide layer are etched. A lifting prevention layer is formed on the whole surface of the resultant structure including the etched gate hard mask layer. The poly silicon layer is etched by using the lifting prevention layer and the gate hard mask layer as etch barriers to form a gate pattern. The impurities are N-type or P-type impurities. The N-type impurity is phosphorus(P) or arsenic(As). The P-type impurity is boron(B) or a III group element.</p>
申请公布号 KR20080089097(A) 申请公布日期 2008.10.06
申请号 KR20070032094 申请日期 2007.03.31
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, DONG RYEOL;PARK, CHANG HEON
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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