| 摘要 |
PURPOSE:To provide a means which subjects digital picture data in a three- dimensional frame memory to rotation, parallel movement, expansion, reduction, and three-dimensional affine transformation of shearing processing to continuously read data. CONSTITUTION:A picture memory device consists of address generating circuits 20 to 22, three-dimensional frame memories 10 to 15, input switching circuits 40 to 42, output switching circuits 50 to 52, data interpolating circuits 30 to 32, and high-speed data transfer busses 60 to 66. The processing to read out data in three-dimensional frame memories 10 to 13 in the picture signal processing is realized by dividing three-dimensional affine transformation into three two-dimensional affine transformations, and a double buffer system is adopted in memories 10 to 13 to simultaneously execute respective two-dimensional affine transformation processings in parallel. |
