发明名称 SYNCHRONOUS SIGNAL PROCESSING CIRCUIT
摘要 <p>PURPOSE:To perform block synchronization well by respectively independently setting a first error allowable bit number used for detecting synchronous timing signals for a front protective operation and a second error allowable bit number used for detecting the synchronous tinning signals for a rear protective operation. CONSTITUTION:A synchronous signal processing circuit 10 is provided with a synchronous separation circuit 12 for front protection and the synchronous separation circuit 14 for rear protection. Reception data are inputted from an input terminal 18 to a BIC data error number detection circuit 16 of the synchronous separation circuit 12 for the front protection, an error allowable bit number relating to the front protection is inputted from the input terminal 22 to an error allowable bit number setting circuit 20 and time error allowable bit number is set. Also, the error allowable bit number relating to the rear protection is inputted from the input terminal 26 to the error allowable bit number setting circuit 24 of the synchronous separation circuit 14 for the rear protection and the error allowable bit number is set.</p>
申请公布号 JPH06326700(A) 申请公布日期 1994.11.25
申请号 JP19930115861 申请日期 1993.05.18
申请人 NIPPON HOSO KYOKAI <NHK>;SANYO ELECTRIC CO LTD 发明人 TAKADA MASAYUKI;KURODA TORU;TSUCHIDA KENICHI;ISOBE TADASHI;YAMADA TSUKASA;NAKAJIMA HIROSHI;MASUMOTO TAKAHIKO;TOMITA YOSHIKAZU
分类号 H04B7/26;H04J3/06;H04L7/08;(IPC1-7):H04L7/08 主分类号 H04B7/26
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