发明名称 POLICING CIRCUIT
摘要 <p>PURPOSE:To reduce the capacity of hardware in a policing circuit in an ATM network by block-dividing a stamp memory part by each user based on the number of allowable arriving cells and cyclicly using it within block division. CONSTITUTION:A cell detector 1 receives an input cell and detects added cell kind information. In the case of a user cell, the detector 1 detects a user identification number and outputs it and when an identification number is shown as virtual line identification data, the detector 1 detects the identification number and outputs it. A judging and comparing part 2 outputs the judging result of whether an arriving cell is normal or violating and at the time of judging it to be normal, the number of the memories of a counter memory 4 is incremented by one and a time-stamp memory part 5 time-stamps. The memory part 5 is block-divided to the number A of users and its memory area is block-divided by each user to store the output value of mobile counter in a next address shown by a pointer as an arriving time when the cell arrives. The number of the blocks is the number of the allowable cells of each user. Thereby, a memory capacity can be reduced.</p>
申请公布号 JPH06311178(A) 申请公布日期 1994.11.04
申请号 JP19930096064 申请日期 1993.04.22
申请人 HITACHI LTD;NIPPON TELEGR & TELEPH CORP <NTT>;FUJITSU LTD 发明人 SHINADA SHIGEO;TAKANO MITSUHIRO;TAKASE MASAHIKO;YAMANAKA NAOAKI;SATO YOICHI;TAKEO HIROSHI;KUSAYANAGI MICHIO;IGUCHI KAZUO;TANAKA ATSUSHI
分类号 G06F19/00;H04L12/28;H04L12/813;H04L12/911;(IPC1-7):H04L12/48;G06F15/48 主分类号 G06F19/00
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