发明名称 |
Electrical circuitry with threshold control |
摘要 |
Electrical circuitry of CMOS inverter circuits in cascade providing a compatible interface between ECL logic levels and CMOS logic levels. The ECL input is applied to the gate of the N-type transistor of the first inverter circuit. A threshold control circuit includes a CMOS inverter circuit with the gate of the N-type transistor connected to a reference voltage and the gate of the P-type transistor connected to its drain is connected to the gate of the P-type transistor of the first inverter circuit. The threshold control circuit adjusts the threshold voltage of the first inverter circuit so as to compensate for changes in current flow through the N-type or P-type transistors, thereby permitting operation over extreme variations in circuit parameters under situations of poor operating tolerances and wide temperature variations.
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申请公布号 |
US5361006(A) |
申请公布日期 |
1994.11.01 |
申请号 |
US19930035138 |
申请日期 |
1993.03.19 |
申请人 |
GTE LABORATORIES INCORPORATED |
发明人 |
COOPERMAN, MICHAEL;SIEBER, RICHARD |
分类号 |
H01L27/02;H03K19/003;H03K19/0185;(IPC1-7):H03K19/017;H03K19/094 |
主分类号 |
H01L27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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