| 摘要 |
PCT No. PCT/EP95/02702 Sec. 371 Date Feb. 21, 1997 Sec. 102(e) Date Feb. 21, 1997 PCT Filed Jul. 7, 1995 PCT Pub. No. WO96/02071 PCT Pub. Date Jan. 25, 1996A process of forming a packaged integrated circuit by aperturing a discrete packaging layer attached on a silicon substrate. A plurality of solder leads are formed on the layer. Electrical connections are formed from the leads to pads on the substrate. |
