| 摘要 |
<p>PURPOSE:To obtain the quantization circuit of a reduced circuit scale, which executes at high speed. CONSTITUTION:A rounding constant X is stored in a rounding constant register 101 for inputting a positive number when a DCT coefficient R is positive and a rounding constant X is stored in a rounding constant register 102 for inputting a negative number when a DCT coefficient R is negative. A selecting circuit 103 selects a rounding constant for a positive or negative number by the code bit of a DCT coefficient R and inputs it to an adder 105. On the other hand, a multiplier 104 obtains the product of the DCT coefficient R and the inverse number A of a quantization threshold value. The adder 105 obtains (AR+X), a shifter 106 shifts it to right by S bits and a range limitting circuit 107 limits the range of a quantization coefficient to a specified value. Thereby, the DCT coefficient R is quantized by the quantization threshold value Q to obtain the result L rounded into an integer.</p> |
