DYNAMIC CONTROL OF CONFIGURABLE LOGIC

摘要

A method and device (1) for performing configurable logic functions is disclosed. A logic array (12) is configured by a plurality of DRAM cells in DRAM (3) through bus CN. The DRAM cells in DRAM (3) are, in preferred embodiments, loaded in a serial fashion with a shift register in programming and refresh circuitry (6). Refresh, according to one aspect of the invention, utilizes a shift register using a circulating '0' in programming and refresh circuitry (6). A charge pump circuit, voltage boost circuit and a variety of memory cell/logic array configurations are also disclosed.