| 摘要 |
A semiconductor memory device of the present invention is a dual port RAM with write-per-bit function which includes main input buffer circuits and sub input buffer circuits, which take the function of write inhibit detection circuits, and extension bus lines connecting the main and sub input buffer circuits. In the dual port RAM, elements which perform the write inhibit function are not collectively arranged around the data input/output terminals, and, therefore, it is suitable to partitioning of a memory cell array into a plurality of blocks as required due to increase of memory capacity and integration density of the dual port RAM.
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