| 摘要 |
PURPOSE: To reduce power consumption. CONSTITUTION: This circuit is provided with a sense inverter I5 having an input node for receiving a sense current signal and an output node for generating a voltage output, an N-channel MOS clamp transistor N5 and a P-channel MOS clamp transistor P5. The N-channel clamp transistor N5 has a drain connected to a higher power supply potential VCC and a source connected to the input node of inverter 15. The P-channel clamp transistor P5 has a drain connected to a lower power supply potential VSS and a source connected to the input node of sense inverter 15. The gates of N-channel and P-channel transistors N5 and P5 are connected to the output node of sense inverter 15. Besides, an activated transistor and a power down transistor can be also provided so as to operate the clamp circuit in power down mode operation. |
