| 摘要 |
PURPOSE:To reduce step-difference and improve patterning precision of digit lines, by forming at least one conductive film as a dummy on an element isolation insulating film simultaneously with word lines, and a first and a second capacitor electrodes next to a memory cell array. CONSTITUTION:An interlayer insulating film is grown, and a capacitor contact hole IVC 1 is formed on one of the source and drain regions of a switching transistor. A polycrystalline silicon film is grown, and a first capacitor electrode 106 and a dummy capacitor electrode 106d are formed by shaping the film into a specified pattern. The dummy capacitor electrode is arranged next to the memory cell array end portion. A capacitor insulating film 107 and a second capacitor electrode 108 are grown and patterned in a specified form. The level- difference H1 of the memory cell array part and a peripheral circuit part is reduced, and a gentle interlayer insulating film 109 can be formed, so that patterning precision of digit lines formed on the second capacitor electrode can be improved. |
