SEMICONDUCTOR MEMORY DEVICE WITH IMPROVED WRITE OPERATION

摘要

The bit lines are equalized rapidly after read action and input data is written so that write start time becomes rapid. The dynamic RAM includes a write equalizer (40) for precharging bit line pair with a certain level equalization voltage, an equalizer selection circuit (60) for providing write equalizer signal to the write equalizer according to a column selection signal, and a write equalizer signal generator for generating write equalizer signal enabled by a pulse signal according to write enable signal.