| 摘要 |
PURPOSE:To provide a coefficient rewriting method for a convolution arithmetic unit which prevents the phase of an input/output signal from changing by preventing overflow occurring in the process of rewriting the coefficient of a DSP(convolution arithmetic unit) which performs the rewriting of a coefficient by dividing from occurring. CONSTITUTION:The convolution arithmetic unit 1 is constituted of a variable delay circuit 2 with such structure that plural delay circuits 2-1 to 2-4 which can change delay time and provided with delay time equivalent to sample delay 3 are connected in series, and a convolution arithmetic processing circuit 6 whose coefficient is set on the sample delay 3 and d0-d8 with same delay time in one sampling period T of an inputted digital signal, respectively and is comprised of a multiplier 4 and an adder 5 rewritable the coefficient, etc. Since the overflow can be prevented from occurring, the coefficient is written by conforming to the position of it, and the change of an output signal for an input signal is corrected by the variable delay circuit 2. |
