发明名称 |
MOVING IMAGE DECODING SYSTEM |
摘要 |
<p>PURPOSE:To miniaturize an LSI by using an inexpensive DRAM as a memory for prediction and reducing the mounting area of the memory. CONSTITUTION:An adder 4 restors picture data by adding the output of an inverse DCT section 3 and the output of a prediction value calculating section 5, and outputting them to a macro block buffer 11. The data temporarily stored in the macro block buffer 11 are written in a dynamic memory 12 for prediction by taking one word data consisting of luminance component (Y) 2X2 sample, Cr component 1X2 sample, and Cb component 1X2 sample as a unit through a memory data bus 100. The predicted reference block in the former frame stored in the dynamic memory 12 for prediction is outputted to a reference block buffer 14 through a memory data bus 100. The restored picture data of the former frame in the memory 12 are outputted to a line buffer 18 through the memory data bus 100.</p> |
申请公布号 |
JPH06189298(A) |
申请公布日期 |
1994.07.08 |
申请号 |
JP19920354484 |
申请日期 |
1992.12.16 |
申请人 |
NEC CORP |
发明人 |
KITSUKI TOSHIAKI;SAWADA AKIRA |
分类号 |
H03M7/30;G06T9/00;H04N5/907;H04N11/04;H04N19/42;H04N19/423;H04N19/44;H04N19/50;H04N19/503;H04N19/577;H04N19/593;H04N19/61;H04N19/625;H04N19/85;H04N19/91;(IPC1-7):H04N7/137;G06F15/66 |
主分类号 |
H03M7/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|