| 摘要 |
The system for converting a 50 Hz, 312.5 lines per field video composite input signal into a 60 Hz, 262.5 lines per field video composite output signal includes an A/D converter for converting the entire video input signal into a digital video composite signal. The digital video composite signal is stored in a dual port, FIFO, random access field memory. Write cycle commands are generated by gate array logic (GAL) circuits based upon a color subcarrier signal typical of the 60 Hz, 262.5 line output signal, and a horizontal and vertical field signal based upon the 50 Hz input signal. Read commands for the RAM are generated by the GAL based upon an independently generated 60 cycle (Hz) signal. The GAL also deletes between 15 or 30 video lines from the top of each field based upon a timing relationship from a vertical blanking signal, or in the case of the VCR, the head switch signal and a line count generated from the horizontal sync signal of the video composite input signal. The GAL clocks out the information based upon the selected color subcarrier signal into a D/A converter which in turn transforms the digital video composite signal into an analog video composite signal. The read timing circuit resets the read cycle command when a 262.5, NTSC field line count is exceeded. A single field is converted into a digital format, stored and then reconverted into an analog signal. Conversion from a 60 Hz, 262.5 lines per field signal into a 50 Hz, 312.5 lines per field video composite signal is also disclosed.
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