发明名称 ADDRESS GENERATOR
摘要 The address generating circuit comprises a counter for perfoming up-counting in synchronization with a system clock pulse when an address value generated from a microprocessor is stabilized, and an adder for adding the output of the counter to the address value to be supplied as an address signal of a main memory, thereby improving the processing speed of a system.
申请公布号 KR940005771(B1) 申请公布日期 1994.06.23
申请号 KR19910018680 申请日期 1991.10.23
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, BYONG - HO
分类号 G06F12/02;(IPC1-7):G06F12/02 主分类号 G06F12/02
代理机构 代理人
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