发明名称 SIGNAL DELAY CIRCUIT
摘要 <p>The signal delay circuit comprises an NMOS capacitor having a gate electrode connected to a node and having a source electrode connected to a ground voltage; and a PMOS capacitor having a gate electrode connected to the node and source electrode connected to a power voltage, thereby achieving a high speed operation at a low operating voltage.</p>
申请公布号 KR940005004(B1) 申请公布日期 1994.06.09
申请号 KR19910004505 申请日期 1991.03.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 SHIN, YUN - SUNG
分类号 G11C11/4076;H03K5/00;H03K5/13;(IPC1-7):H03K5/14 主分类号 G11C11/4076
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