Parallelized magnitude comparator for comparing a binary number to a fixed value

摘要

A magnitude comparator suitable for use in a FIFO memory is modified to compare the magnitudes between any binary number and a fixed value. Bit comparators are divided into groups which generate compare output signals in parallel to one another, thereby reducing total magnitude comparator delay and resulting in faster operation. These compare output signals are fed into a control element which determines which compare output signal is allowed to pass through as the final compare output signal.