| 摘要 |
A simplex sequence controller for transmittal of output data is disclosed and includes a time base generator for generating a timing signal, a memory device having a plurality of addressable sequential storage locations for storing a sequence of data pattern with a plurality of output lines and a plurality of input address lines connected to the storage locations, along with an addressing apparatus connected to the memory device input address lines for directing access to predetermined storage locations at predetermined points in the data sequence, and address reset apparatus providing feedback from a first predetermined one of the output lines of the memory device to the addressing apparatus to direct access to a predetermined initial data sequence for output from the memory.
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