| 摘要 |
forming a gate 2 on a substrate 1 and depositing and patterning an oxide 4 to form a buried contact; sequentially forming a first horizontal node polysilicon layer 5, a doped oxide 6, a second horizontal node polysilicon layer 7 and a doped oxide 8 on the overall surface of the substrate and etching to expose the first horizontal polysilicon layer 5; depositing a doped oxide 10 on the etched portion, and forming a trench above the oxide 4; forming a polysilicon spacer; forming a photoresist layer 14 on the overall surface of the substrate, removing a portion of the photoresist layer above the horizontal node polysilicon layer 5 and 7, and then wet etching the oxides 6 and 8, thereby maximizing the effective area of the capacitor.
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