发明名称 Error correction method and apparatus thereof
摘要 An error correction method and apparatus for correcting multiple errors in received digital data word signals calculates syndromes S0, S1, S2 and S3 from a block of n received data words and a parity check matrix H. First coefficients sigma 1 and sigma 2 are calculated from the derived syndromes and a second coefficient K is calculated from the first coefficients sigma 1 and sigma 2. An error location value x1 is calculated from the second coefficient K, actual error location values X1 and X2 are calculated from the value x1, and error values Y1 and Y2 are calculated from the actual error location values X1 and X2. The received data words are then corrected by applying the calculated error values Y1 and Y2. The error location value x1 calculator is preferably constituted by logic gates which enable the apparatus to be smaller and faster than those using a conventional ROM table.
申请公布号 US5315601(A) 申请公布日期 1994.05.24
申请号 US19910707811 申请日期 1991.05.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, MAN-YOUNG;PARK, HAK-SONG;KIM, YOUNG-CHEOL;KIM, TAE-YONG;CHOI, YONG-JIN;KIM, JAE-MOON
分类号 G06F11/10;H03M13/00;H03M13/15;(IPC1-7):G06F11/10 主分类号 G06F11/10
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