发明名称 MICROPROCESSOR FOR MULTIPLE SYSTEM
摘要 <p>PURPOSE:To prevent the chip of a monitor mode from detecting an excess unmatching in a bus cycle where the output terminal of a normal mode becomes a high impedance state in the monitor mode of the microprocessor for multiple system. CONSTITUTION:When a mode selection input terminal 101 selects a monitor mode, monitoring object output terminals 102a-102c make output buffers 103a-103c in a high-impedance state, compares the content of the monitor object output terminal with the content of latches 104a-104c by comparators 105a-105c. When they are not matching, a matching detecting circuit 106 notifies the abnormality to an output terminal 107. In this case, a selection circuit 109 selects a bus cycle making the comparison result invalid from a bus cycle type signal group 108. During this time, a mask circuit 110 masks the output.</p>
申请公布号 JPH06139090(A) 申请公布日期 1994.05.20
申请号 JP19920309422 申请日期 1992.10.24
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 SAKAGUCHI YASUTAKA
分类号 G06F11/18;G06F15/78;(IPC1-7):G06F11/18 主分类号 G06F11/18
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