| 摘要 |
<p>A serial access memory having a first memory cell array and a second memory cell array. The serial access memory is provided with a control circuit for controlling the Most Significant Bit (MSB) of an address supplied to each of the first and second memory cell arrays. The control circuit causes the operations of circuits in the first memory cell array to become identical to those of circuits in the second memory cell array, thereby making it possible to read data at a high speed. An STN type LCD including the serial access memory, has a display device that facilitates production of memory maps in the memory cells without a need for externally-mounted elements such as a multiplexer. <IMAGE></p> |
