发明名称 Clock recovery and time base compensation device for video playback system - temporarily stores digitised video signal under control of different write-in and read-out clock signals
摘要 The device has an A/D converter for converting an analogue video input signal (Vin) into a digital signal entered in a temporary video memory (SP), under control of a write clock (Cw) and a write address (Aw) fed to the memory addressing controller. The digital video data is read out from the memory under control of a read address (Ar) and a read clock (Cr), and converted back into an analogue video output signal (Vout) via a D/A converter (D/A). The A/D converter is controlled by the write clock and the D/A converter is controlled by the read clock, both provided by a control device (SE) receiving the horizontal synchronising pulses (Hsyn) and a clock signal (Cl) provided by a clock source (TG) with a phase regulating loop contg. a resettable divider. ADVANTAGE - Requires single clock generator with optimum coupling between generator and video signal.
申请公布号 DE4303437(C1) 申请公布日期 1994.04.28
申请号 DE19934303437 申请日期 1993.02.05
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 BRAUN, BODO, DR.-ING., 8011 HOEHENKIRCHEN, DE
分类号 H04N5/956;(IPC1-7):H04N5/93;H04N5/907;H04N5/95 主分类号 H04N5/956
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