METHOD AND APPARATUS FOR MEMORY INTERLEAVE REDUCTION

摘要

A method and apparatus is provided for allocating a memory resource that includes a plurality of memory banks (914, 918) to a plurality of slots (916, 920) of a backplane of a bus (24) that operates in accordance with a sequence of frames, each frame having a plurality of bus cycles (4A), such that each slot (914, 918) receives at least one grant of access (4B) to each of the memory banks (916, 920) of each memory resource within each frame. Apparatus is provided for achieving a variety of memory interleaving configurations, as well as a variety of memory interleave reduction factors. An embodiment of a memory board (26, 27) with a fixed memory interleave configuration and a fixed memory interleave reduction factor can be used in tandem with an embodiment of a memory board (26, 27) with a software selectable memory interleave configuration and interleave reduction factor.