发明名称 FAULT RESISTING COMPUTER SYSTEM
摘要 PURPOSE:To switch all interfaces following one bus control part generating a fault to the normal signal bus system side so as to continue processing in a computer constituted of plural pairs of working and stand-by I/O interface parts connected from a buses to plural I/O parts in the working state of the whole signal bus system. CONSTITUTION:A system connecting a centeral control part 1 to I/O parts 13, 14 is duplexed and a pair of buses 5, 6, a pair of bus system control parts 3, 4 and plural working and stand-by I/O interface parts 9, 10 are provided. In addition, a pair of working and stand-by switching lines 12a, 12b for switching the interface parts 9, 10 and a pair of abnormality informing lines 7, 8 for informing the abnormality of the control parts 3, 4 are also included. If either one of the control parts 3, 4 generates abnormality, the abnormality informing line is changed from '0' to '1' and the interface parts 9 or 10 following the abnormal control part are immediately switched to the normal bus system control part side.
申请公布号 JPH0695903(A) 申请公布日期 1994.04.08
申请号 JP19920107182 申请日期 1992.04.27
申请人 NEC CORP 发明人 SUZUKI HIDETO
分类号 G06F11/00;G06F11/18;G06F13/00 主分类号 G06F11/00
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