| 摘要 |
A square-root operating circuit performs square-root at high speed and applies to both a binary signal and a quadruple signal. The square-root operating circuit includes X2 circuits, the performing unit, and adding circuits. The X2 circuits performs a square of an input signal. The performing unit is arranged to perform the square of a candidate square-root of any one of an originally quadruple logic input signal and a quadruple logic input signal converted from a binary logic. The adding circuits compare the input signal with a square of a candidate square-root at each digit and output a result of the comparison so as to discriminate a proper digit of the square-root.
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