发明名称 Method of forming semiconductor device including a CMOS structure having double-doped channel regions
摘要 A semiconductor device has, in one embodiment, a p type insulated gate field effect transistor formed in an n type well formed on a semiconductor substrate and an n type insulated gate field effect transistor formed in a p type well formed on the semiconductor substrate. Each of the p type and n type insulated gate-field effect transistors has a composite impurity layer under its gate electrode in a surface portion of its associated well. The composite impurity layer includes a first doped layer of a p type and a second doped layer of an n type adjacent thereto to form a pn junction layer therebetween, while the composite impurity layer includes a first doped layer of a p type and a second doped layer of a p type adjacent thereto to form a junction layer therebetween having a p type impurity concentration lower than that of the p type well.
申请公布号 US5290714(A) 申请公布日期 1994.03.01
申请号 US19920941825 申请日期 1992.09.08
申请人 HITACHI, LTD. 发明人 ONOZAWA, KAZUNORI
分类号 H01L21/8238;H01L21/8249;H01L27/06;H01L27/092;(IPC1-7):H01L21/265 主分类号 H01L21/8238
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