| 摘要 |
A device for changing a frequency of an internal control clock for testing a chip, by incorporating a mode selection circuit (30) and a high voltage detection circuit (40) in a serial input/output memory. The mode selection circuit (30) is connected between two selected adjacent circuits Cn-2, Cn-1 among a plurality of frequency conversion circuits C1 . . . Cn, for accessing selectively either a clock pulse CPn-2 from the frequency conversion circuit Cn-2, arranged in front thereof or a system clock XSK, in dependence upon an internal voltage sense signal IV, IVB. The high voltage detection circuit (40) transmits the internal voltage sense signal to the mode selection circuit (30) by detecting a level of externally applied voltage XV. The internal control clock ICK provided by this device attains a period of TXSK*2n-M+1, wherein "M" is a number of the counter receiving the mode selection signals MS, MSB next to the mode selection circuit. |
