Circuit arrangement for removing stuff bits

摘要

The circuit described for removing stuff bits from a frame-structured signal which occurs in each case with n parallel bits contains a memory circuit (2), to which the parallel bits (1b) are supplied. A controllable selection circuit (3) with n outputs (3a) is connected downstream from the memory circuit (2). A control circuit (9) generates control signals (9a, 9b, 9c) which are used to ascertain which of the bits stored in the memory circuit are forwarded to the n outputs (3a) of the selection circuit (3). The memory circuit (2) is made up of n delay components only, with which each of the n parallel bits (1b) is delayed by the duration of one bit. To ensure that n delay components are adequate, the control circuit (9) must prevent one or more delay components from accepting new bits at predetermined times. <IMAGE>