发明名称 Method and apparatus for performing carry look-ahead addition in a data processor
摘要 A carry look-ahead (CLA) adder accommodates a late carry-in from a low-order external 32-bit adder to enable a 96-bit addition to be performed in the same time in which the CLA adder (60) performs a 64-bit addition. Within each adder slice, intermediate group propagate and group generate terms are generated for each bit location in the adder (60), while the adder simultaneously generates an n-bit group propagate and group generate term. The intermediate group propagate and group generate terms are combined with carry-in terms to generate, in parallel, local carry-out terms within each adder slice. The local carry-out terms and intermediate group propagate and group generate terms are used to form a carry chain path which allows the adder to delay the carry-in of an external carry term.
申请公布号 US5276635(A) 申请公布日期 1994.01.04
申请号 US19930069646 申请日期 1993.06.01
申请人 MOTOROLA, INC. 发明人 NAINI, AJAY;ANDERSON, WILLIAM C.
分类号 G06F7/50;G06F7/508;(IPC1-7):G06F7/50 主分类号 G06F7/50
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