发明名称 |
A/D converter. |
摘要 |
<p>A filter processing unit 2 receives the output of an oversampling-type A/D converter circuit 1. Predetermined information is acquired by a compensation circuit 3-1 with predetermined timing from the filter processing unit 2 in the course of processing for producing a filter output for a predetermined integration-phase state and the predetermined information is fed back to the filter processing unit 2 as compensation information representing a difference in magnitude between a filter output with an integration phase lagging behind or leading ahead of the predetermined integration-phase state and a filter output with an unchanged integration phase in order to produce a controllable-phase filter output DMout. The timing for the acquisition of the compensation information by the compensation circuit 3-1 is controlled by a control circuit 7-1. <IMAGE></p> |
申请公布号 |
EP0575071(A2) |
申请公布日期 |
1993.12.22 |
申请号 |
EP19930304296 |
申请日期 |
1993.06.03 |
申请人 |
HITACHI, LTD. |
发明人 |
HARA, HIROTAKA;ISHIHARA, YUKIHITO;KOKUBO, MASARU |
分类号 |
H03H17/08;H03H17/00;H03H17/02;H03H17/06;H03M3/04;(IPC1-7):H03M1/12 |
主分类号 |
H03H17/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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