发明名称 |
Finite field parallel multiplier |
摘要 |
A finite field parallel multiplier in GF(qm) including a router for directing 2m-1 components in m groups of m single-component signal lines towards m computing circuits for performing multiply and add modulo-q. The router guides m components from a first finite field element along with an additional m-1 components generated from linear combinations of the m components of the first finite field element. Each of the computing circuits receives all of the components from the second finite field element and m components provided by one set of signal lines through the router. Each computing circuit generates a single component for the resultant finite field element. These resulting components may be input through a basis change circuit to obtain a result in the desired basis.
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申请公布号 |
US5272661(A) |
申请公布日期 |
1993.12.21 |
申请号 |
US19920990524 |
申请日期 |
1992.12.15 |
申请人 |
COMSTREAM CORPORATION |
发明人 |
RAGHAVAN, SREENIVASA A.;HEBRON, YOAV;GURANTZ, ITZHAK;ESSERMAN, JAMES N. |
分类号 |
G06F7/72;(IPC1-7):G06F7/00 |
主分类号 |
G06F7/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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